Dram timing control – Asus Crosshair Benutzerhandbuch

Seite 94

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4-26

Kapitel 4: BIOS-Setup

CHA/CHB CKE Fine Delay [Auto]

Konfigurationsoptionen: [Auto] [No delay] [1/64 MEMCLK delay] [2/64 MEMCLK

delay] [3/64 MEMCLK delay] ~ [31/64 MEMCLK delay]
CHA/CHB CKE Setup Time [Auto]

Konfigurationsoptionen: [Auto] [1/2 MEMCLK] [1 MEMCLK]
CHA/CHB C/S ODT Fine Delay [Auto]

Konfigurationsoptionen: [Auto] [No delay] [1/64 MEMCLK delay] [2/64 MEMCLK

delay] [3/64 MEMCLK delay] ~ [31/64 MEMCLK delay]
CHA/CHB C/S ODT Setup Time [Auto]

Konfigurationsoptionen: [Auto] [1/2 MEMCLK] [1 MEMCLK]
CHA/CHB Add/CMD Fine Delay [Auto]

Konfigurationsoptionen: [Auto] [No delay] [1/64 MEMCLK delay] [2/64 MEMCLK

delay] [3/64 MEMCLK delay] ~ [31/64 MEMCLK delay]
CHA/CHB Add/CMD Setup Time [Auto]

Konfigurationsoptionen: [Auto] [1/2 MEMCLK] [1 MEMCLK]
Read DQS Timing Control [Auto]

Konfigurationsoptionen: [Auto] [No delay] [1/96 MEMCLK delay] [2/96 MEMCLK

: [Auto] [No delay] [1/96 MEMCLK delay] [2/96 MEMCLK

delay] [3/96 MEMCLK delay] ~ [47/96 MEMCLK delay]

DRAM Timing Control

F1:Help ↑↓ : Select Item

-/+: Change Value

F5: Setup Defaults

ESC: Exit →←: Select Menu

Enter: Select Sub-menu F10: Save and Exit

Select Menu

Item Specific Help

Press [Enter] to set.

Phoenix-Award BIOS CMOS Setup Utility

Extreme Tweaker

DRAM Timing Control

CHA CKE Fine Delay

[Auto]

CHB CKE Fine Delay

[Auto]

CHA CKE Setup Time

[Auto]

CHB CKE Setup Time

[Auto]

CHA CS/ODT Fine Delay

[Auto]

CHB CS/ODT Fine Delay

[Auto]

CHA CS/ODT Setup Time

[Auto]

CHB CS/ODT Setup Time

[Auto]

CHA Add/CMD Fine Delay

[Auto]

CHB Add/CMD Fine Delay

[Auto]

CHA Add/CMD Setup Time

[Auto]

CHB Add/CMD Setup Time

[Auto]

Read DQS Timing Control

[Auto]

Write Data Timing Control

[Auto]

DQS Receiver Enable Timing

[Auto]

R/W Queue Bypass [Auto]
Konfigurationsoptionen: [Auto] [2x] [4x] [8x] [16x]
Dynamic Idle Cycle Counter [Auto]

Konfigurationsoptionen: [Auto] [Disabled] [Enabled]
Idle Cycle Limit [Auto]

Konfigurationsoptionen: [Auto] [0 cycles] [4 cycles] [8 cycles] [16 cycles] [32 cycles]

[64 cycles] [128 cycles] [256 cycles]
DCQ Bypass Maximum [Auto]

Konfigurationsoptionen: [Auto] [0x] [1x] [2x]~[15x]
DRAM Burst Length [Auto]

Konfigurationsoptionen: [Auto] [64-byte] [32-byte]
DRAM Bank Interleaving [Enabled]

Konfigurationsoptionen: [Disabled] [Enabled]

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